芯片物理岗位职责

芯片物理岗位职责

在充满活力，日益开放的'今天，很多场合都离不了岗位职责，岗位职责是一个具象化的工作描述，可将其归类于不同职位类型范畴。你所接触过的岗位职责都是什么样子的呢？以下是小编帮大家整理的芯片物理岗位职责，欢迎阅读与收藏。

Work with Frond-End design team and Physical design team for large scale ASIC chip physical implementation ( Hierarchical Design ). Include top level physical partition , block sizing and shaping , block port assignment, power planning , top/block level PR implementation .

Work for project high quality and on time delivery.

Responsibilities :

1. Responsible for Verilog to GDS implementation , power signoff ,area eva luation ,Timing closure ,STA,Physical verification

2. Experienced in EDA tools (e.g. Synopsys ,Candence , Mentor etc)

3. Critical issue resolve on top congestion or timing issues.

4. Better be expert on one or more aspect like : clock tree synthesis /power/physical verification.

Skills and Knowledge:

1. Good knowledge for synthesis , floorplan , place-and-route , timing closure , DFM , DFT, power analysis, Signal integrity analysis , Hierarchical flow

2. Good at using script processing.(TCL、Perl……)

3. Project tapeout experience is needed

4. 28nm and beyond (advanced node) tapeout experience is a good plus.

5. Strong verbal communication and interpersonal skills to work closely with a variety of individual

6. Team work spirit

Qualifications

Education and Experience

MSEE with 3+ years or Bachelor with 5+ of industrial experience of deep submicron digital ASIC design.